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topic/Flip-Flops and Timers

Question NoTitleTypeMarks
1169.Which of the following is correct for a gated D-type flip-flop?
MCQ
5
1170.When both inputs of a J-K flip-flop cycle, the output will:
MCQ
5
1171.Latches constructed with NOR and NAND gates tend to remain in the latched condition due to which configuration feature?
MCQ
5
1172.The 555 timer can be used in which of the following configurations?
MCQ
5
1173.A basic S-R flip-flop can be constructed by cross-coupling which basic logic gates?
MCQ
5